The invention relates generally to methods for semiconductor defect detection and classification. More particularly, the invention relates to a digital computer system for carrying out defect detection and defect classification operations in one automated system. The system also utilizes multiple defect masks and multiple focus planes in the defect feature extraction process.
The automatic detection of defects during the fabrication of semiconductor wafers is largely automated, but the classification of those defects is in many cases still performed manually by technicians. Projections by semiconductor manufacturers are that with larger wafer sizes and smaller line width technology, the number of defects to be manually classified will increase exponentially. While humans are adept at classifying suspect defects, modem automated wafer inspection systems are already detecting 50,000 to 100,000 defects a day. In an attempt to reduce the volume of defects that must be investigated manually, ways are being sought to further automate the defect identification and classification processes.
In our invention, the semiconductor defect classification is based on the features of the defects themselves and also on their location with respect to process layers of the semiconductor wafer. By combining both defect features and defect location (context) features, our invention makes possible the correct classification of many types of semiconductor defects, and it allows the manual investigations as to the source of the defects to be carried out more quickly and accurately.
It is an object of the invention to provide an automated semiconductor wafer defect classification system that classifies defects based on a combination of their location with respect to process layers of the semiconductor wafer and the defect characteristics.
It is another object of the invention to provide an automated semiconductor wafer defect classification system that uses region classification based on defect edge information and intensity content.
It is another object of the invention to provide an automated semiconductor wafer defect classification system that decreases wafer inspection time, improves the reliability of the defect classification, and thereby increases the process throughput and yield.
It is another object of the invention to provide an automated semiconductor wafer defect classification system that incorporates image analysis, feature extraction, and pattern recognition and classification methods.
It is another object of the invention to provide an automated semiconductor wafer defect classification system that utilizes image segmentation and feature extraction in the presence of semi-regular background texture.
It is another object of the invention to provide an automated semiconductor wafer defect classification system that utilizes new defect features for better differentiating between defect types and classes.
It is another object of the invention to provide an automated semiconductor wafer defect classification system that utilizes feature extraction methods based on fractal dimension, multiple-focus imagery, multiple colorspace, and multiple defect mask implementations.
The present invention utilizes a digital computer for automatically classifying defects in a semiconductor wafer and comprises a means for identifying the background layers in a reference semiconductor wafer image resulting in a layer identification image, a means for registering a defect semiconductor wafer image to the reference semiconductor image and subsequently detecting a defect in the defect semiconductor image, a means for classifying the detected defect using features of the defect, a database for storing precomputed information and sharing information between the background layer identifying means and the detected defect classifying means, and a means for associating the classified detected defect with the layer identification image resulting in a context-based classification of the defect.